The present invention relates to a method of polishing semiconductor substrates in such a manner as to prevent the semiconductor substrates from cracking, and to a polishing jig to be used in the polishing method.
In the field of semiconductor manufacture, during manufacturing processes, thick substrates typically undergo processing in order to prevent semiconductor substrates from cracking. After the formation of patterns, the reverse side of each substrate is polished for the thickness of the substrate to match specifications. During this polishing process, semiconductor substrates are fixed to circular quartz plates using wax. Each of the quartz plates is further mounted in the polishing holder used for applying a load to the semiconductor substrate. An alkali polishing liquid containing a polishing agent is supplied to the quartz-made polishing surface of a polishing apparatus, and the semiconductor substrate that has been pressed firmly against the polishing surface is polished.
The above process is described below using FIGS. 5A and 5B. FIGS. 5A, 5B are views that explain semiconductor substrate polishing based on a related technology. FIG. 5A is a plan view from a polishing surface, showing a quartz disc 120 to which the patterned face of a semiconductor substrate 103 is fixed using a wax 104, and a polishing holder 105 in which the quartz disc 120 is mounted. FIG. 5B is a sectional view that explains section IV-IV′ of the polishing holder assembly 100 and quartz surface plate 107 when viewed during polishing. In FIG. 5A, notches 105a are provided in angle steps of 90 degrees in the polishing holder 105. In FIG. 5B, a polishing liquid 106 containing a polishing agent is supplied to the surface of the surface plate 107. The surface plate 107 is rotating around its rotation axis not shown, and the polishing holder 105 itself is also revolving on its axis by means of a rotating mechanism not shown, so the semiconductor substrate 103 is polished while revolving on its axis. Such polishing is a combination of chemical polishing with a polishing liquid, and mechanical polishing with a polishing agent, and this polishing scheme is called CMP (Chemical-Mechanical Polishing).
Japanese Patent Laid-Open No. 2004-71667 describes solutions to the following problems associated with the related technology, in perspectives different from those of the present invention:
A space exists at section A in FIG. 5B mentioned above in “Background of the Invention”. During the initial phase of polishing, this space has the same height as the thickness of the substrate supplied to the wafer process. The polishing liquid 106, when supplied to section A, repeatedly melts the wax 104 between the semiconductor substrate 103 and the quartz disc 120, and as the wax 104 is consumed, it is thinned down and reduced in strength by polishing. As a result, the wax loses the fixing force and may permit the semiconductor substrate 103 to move slightly upward, thus damaging the outer surface of the substrate. The substrate is also prone to cracking, since it is in mechanical contact with the surface plate 107. During the processes that follow the polishing process, such cracking causes further damage to the semiconductor substrate or results in semiconductor chip damage.